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(parent: 5cc8c7b) | patch
Add workaround for errata 1073348 for Cortex-A76
authorLouis Mayencourt <[email protected]>
Mon, 25 Feb 2019 15:17:44 +0000 (15:17 +0000)
committerLouis Mayencourt <[email protected]>
Tue, 26 Feb 2019 16:21:06 +0000 (16:21 +0000)
commit5c6aa01affe14c40efdebdc9450cdbc4ae0bc494
tree4642c4f18dec3b95d02884414f2bc5124c756dc8tree | snapshot
parent5cc8c7ba1b24ace2ef7345e96d933141f3609817commit | diff
Add workaround for errata 1073348 for Cortex-A76

Concurrent instruction TLB miss and mispredicted return instruction
might fetch wrong instruction stream. Set bit 6 of CPUACTLR_EL1 to
prevent this.

Change-Id: I2da4f30cd2df3f5e885dd3c4825c557492d1ac58
Signed-off-by: Louis Mayencourt <[email protected]>
docs/cpu-specific-build-macros.rst diff | blob | history
include/lib/cpus/aarch64/cortex_a76.h diff | blob | history
lib/cpus/aarch64/cortex_a76.S diff | blob | history
lib/cpus/cpu-ops.mk diff | blob | history
Broadcom-s Trusted Firmware A